Technologies which allow the production of accurately structured encapsulation or passivation layers and/or cavities have been developed for the manufacture of integrated electronic, optoelectronic or other components for microsystems. Optoelectronic components which have an optical sensor or optically active elements are packaged using translucent covers which protect the light-sensitive elements against environmental influences, such as moisture, or, for example, against mechanical damage.
In this case, glass is used for a multiplicity of applications, inter alia, because of its optical characteristics and excellent passivation characteristics. In comparison to the plastics which are frequently used for packaging and encapsulation of semiconductor components, glasses have, for example, significantly less permeability for air and, furthermore, also offer excellent protection against water, water vapor and in particular also against corrosive substances, such as acids and bases.
Microcomponents packaged in this way are typically used in conjunction with, for example, fingerprint sensors, MEMS parts, CCT cameras and scanners. This means that these methods are particularly suitable for packaging of components which have a sensitive area, for example an optical sensor, which must be protected by a package in which, however, the package must ensure that the sensor retains its external, for example optical, accessibility.
The manufacture of the component, the packaging of the components and the production of the connecting contacts to the exterior are carried out either while still in a composite form in a wafer (wafer-level packaging) or on the separated component or semiconductor chip (single-size packaging).
However, packaging of the components or chips after separation has the disadvantage that the integrated circuits and/or sensitive areas of the component are exposed during the separation process, and their function is adversely affected by the dirt or dust created when sawing up (dicing) the wafers.
During the course of wafer-level packaging, the active area, for example in the case of an optically active area of a semiconductor component, is therefore protected by adhesively bonding a glass or a film on the silicon wafer.
The completely cut components, so-called dice, must, however, be readjusted and aligned after the dicing process, that is to say after the dice have been separated from the wafer, before they can be subjected to the packaging process, and this leads to additional manufacturing steps, correspondingly slowing down production, and making it more expensive.
In the meantime, widely differing wafer-level packaging methods, in particular, have been used for the production of integrated electronic and optoelectronic or other microcomponents.
One fundamental problem which frequently occurs in this case is that the materials which are used for covering can be structured only with difficulty in order, for example, to provide contact connections passing through for connecting contacts.
Conventional techniques such as ultrasound oscillation lapping are normally used to produce holes in the packaging or covering material although only relatively “large” holes with a diameter of about 0.5 mm can be produced in this case.
Document WO 99/40624 has already proposed for a plurality of electrical contacts to in each case share one hole, thus making it possible to reduce the number of holes and, in consequence, to increase the structure density. In this case as well, however, very small holes, which are therefore difficult to produce, are still required, with the additional complication of having to pass a plurality of contact connections through one hole.
The production of “pocket-like” structures, as described in patent application DE 10147648 A1 for production of cavities (“hollows”) and holes in a glass wafer is carried out by heating a glass pane to its softening temperature, after which it is shaped on a negative mold, and is finally cooled down. The structures produced, in the range from 2 to 5 mm, do not yet lead to sufficiently small structures, however. Furthermore, the surface quality of the deformed glass pane is inadequate, in terms of its optical quality for high-sensitivity optical parts.
In addition, glasses which can be structured photographically, such as “Foturan” are available, and allow fine structures to be produced by photolithography. However, they have the disadvantage that these glasses have a coefficient of expansion which is not the same as that of silicon, which is normally used as the mount substrate, and packaging or covering with these glasses leads to stresses between the substrate and the package.
After the final step of packaging and/or contact exposure, the wafer is broken up into individual, generally square chips (so-called dicing). The dicing process is typically carried out using a saw, cut-by-cut, with a feed rate of approximately 2 to 3 mm/min. The time required to completely dice a wafer can therefore be in the order of magnitude of an entire day, resulting in correspondingly high costs. The mechanical characteristics of the passivation layers and packages can additionally exacerbate and slow down the dicing of the wafer, depending on the material, especially in the case of glass-like materials.